The present invention relates to the field of semiconductor manufacturing. More particularly, the present invention provides methods of obtaining diffusion-enhanced crystallization of amorphous materials to improve surface roughness of the resulting crystallized material.
Hemispherical grain silicon (commonly referred to as HSG silicon) is one example of a crystallized material with a roughened surface, i.e., a surface that is not smooth. Electrically conductive roughened surfaces are useful in the manufacturing of dynamic semiconductor storage devices requiring storage node capacitor cell plates large enough to maintain adequate charge, i.e., capacitance, in the face of parasitic capacitances and noise that may be present during operation of a circuit including the storage devices. Maintaining storage node capacitance is especially important due to the continuing increases in Dynamic Random Access Memory (DRAM) array density.
Such DRAM devices, among others, rely on capacitance stored between two conductors separated by a layer of dielectric material. One method of increasing the capacitance of a capacitor formed using conductive polysilicon layers is to increase the surface area of the conductors. Using hemispherical grain (HSG) silicon for the first conductor is one method of increasing the surface area of the conductors because the later-deposited dielectric layer and second conductor will typically conform to the surface of the first deposited conductor.
Hemispherical grain silicon can be obtained by a number of methods including Low Pressure Chemical Vapor Deposition (LPCVD) at conditions resulting in a layer of roughened polysilicon. Another method includes depositing a layer of amorphous silicon, followed by high temperature seeding and/or annealing to cause the formation of hemispherical grain silicon.
The silicon layers to be converted into hemispherical grain silicon or deposited as hemispherical grain silicon are not, however, typically in situ doped during deposition because in situ doping of those layers can result in smaller grain size, thereby reducing surface area and capacitance. Furthermore, in processes where the HSG silicon layer is doped after formation, the roughness of the surface can be reduced by the post-formation doping processes. For example, diffusion doping of the HSG silicon may result in a layer of oxide that would need to be removed before deposition of the dielectric layer. The oxide layer may be removed using an etch process that could reduce the roughness of the HSG silicon layer. Ion implantation, another technique for doping an undoped layer of HSG silicon may also reduce the surface roughness of the HSG silicon.
The present invention provides methods of forming a roughened surface through diffusion-enhanced crystallization of an amorphous material. In one aspect, the present invention comprises conductive hemispherical grain silicon formed through dopant diffusion-enhanced crystallization of one or more layers of amorphous silicon.
To further enhance uniformity in the formation of the hemispherical grain silicon, the exposed surface of the amorphous silicon can be seeded before crystallization to further enhance uniformity of the surface structures formed in the hemispherical grain silicon.
In one aspect, the present invention provides a method of forming a roughened surface comprising steps of providing a layer having an exposed surface on a substrate, the layer comprising an amorphous material and at least a portion of the layer including a dopant, wherein the concentration of dopant is substantially lower at the exposed surface than in at least a portion of the underlying amorphous material; and crystallizing the amorphous material to form the roughened surface.
In another aspect, the present invention provides a method of forming hemispherical grain silicon comprising steps of providing a layer having an exposed surface on a substrate, the layer comprising amorphous silicon and at least a portion of the amorphous silicon including a dopant, wherein the concentration of dopant is substantially lower at the exposed surface than in at least a portion of the underlying amorphous silicon; and annealing the layer of amorphous silicon.
In another aspect, the present invention provides a method of increasing the uniformity in a layer of hemispherical grain silicon comprising steps of providing a layer comprising amorphous material having an exposed surface on a substrate, at least a portion of the amorphous silicon including a dopant, wherein the concentration of the dopant is substantially lower at the exposed surface than in at least a portion of the underlying amorphous silicon; providing seeds on the exposed surface; and annealing the layer of amorphous silicon after the seeds are provided on the exposed surface.
In another aspect, the present invention provides a method of forming hemispherical grain silicon comprising steps of providing a first layer of doped amorphous silicon on a substrate; providing a second layer of amorphous silicon having an exposed surface opposite the first layer, wherein the second layer of amorphous silicon is undoped or doped to a concentration less than the concentration of dopant in the first layer; annealing the first and second layers of silicon.
In another aspect, the present invention provides a method of increasing uniformity in a layer of hemispherical grain silicon comprising steps of providing a first layer of doped amorphous silicon on a substrate; providing a second layer of amorphous silicon having an exposed surface opposite the first layer, wherein the second layer of amorphous silicon is undoped or doped to a concentration less than the concentration of dopant in the first layer; providing seeds on the exposed surface of the second layer of amorphous silicon; and annealing the first and second layers of amorphous silicon after the seeds are provided on the exposed surface of the second layer.
In another aspect, the present invention provides a method of forming hemispherical grain silicon comprising steps of providing a base layer of amorphous silicon on a substrate; providing a first layer of doped amorphous silicon on the base layer; forming a second layer of amorphous silicon on the first layer, the second layer having an exposed surface, wherein the second layer of amorphous silicon is undoped or doped to a concentration less than the concentration of dopant in the first layer; annealing the base, first, and second layers of silicon.
In another aspect, the present invention provides a method of improving uniformity in a layer of hemispherical grain silicon comprising steps of providing a base layer of amorphous silicon on a substrate; providing a first layer of doped amorphous silicon on the base layer; forming a second layer of amorphous silicon on the first layer, the second layer having an exposed surface, wherein the second layer of amorphous silicon is undoped or doped to a concentration less than the concentration of dopant in the first layer; providing seeds on the exposed surface of the second layer of amorphous silicon; and annealing the base, first, and second layers of amorphous silicon after the seeds are provided on the exposed surface of the second layer.
In another aspect, the present invention provides a method for manufacturing a semiconductor device comprising steps of providing a layer comprising amorphous material having an exposed surface on a semiconductor substrate, at least a portion of the amorphous silicon including a dopant, wherein the concentration of dopant is substantially lower at the exposed surface than in at least a portion of the underlying amorphous silicon; annealing the layer of amorphous silicon to form conductive hemispherical grain silicon, wherein the layer of conductive hemispherical grain silicon forms a first electrode of a capacitor; providing a layer of dielectric material on the first electrode; and providing a second electrode of the capacitor on the dielectric material.
In another aspect, the present invention provides a method for manufacturing a semiconductor device comprising steps of providing a layer comprising amorphous material having an exposed surface on a semiconductor substrate, at least a portion of the amorphous silicon including a dopant, wherein the concentration of dopant is substantially lower at the exposed surface than in at least a portion of the underlying amorphous silicon; providing seeds on the exposed surface of the amorphous silicon; annealing the layer of amorphous silicon to form conductive hemispherical grain silicon, wherein the layer of conductive hemispherical grain silicon forms a first electrode of a capacitor; providing a layer of dielectric material on the first electrode; and providing a second electrode of the capacitor on the dielectric material.
These and other features and advantages of methods according to the present invention are described in the detailed description of the invention below.